Crosstalk-aware PWM-based on-chip links with self-calibration in 65 nm CMOS

This paper proposes two crosstalk-aware signaling techniques based on pulse width modulation (PWM) for energy-efficient on-chip global busses. Two bits of information are encoded into transition type and pulse width for transmission over one wire. The effect of crosstalk on pulses is compensated by pre-correction techniques and self-calibration circuitry mitigates variability. Measurements from 5 mm on-chip links in 65 nm CMOS show that the proposed schemes simultaneously achieve 15% performance improvement, 46% peak energy reduction, up to 25% average energy reduction, and >2X leakage reduction compared to conventional repeaters. Self-calibration of the encoder and decoder circuits against process variation reduced the delay spread of 21 chips by > 2.5X.