TY - JOUR
T1 - Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers
AU - Jamieson, Peter
AU - Le, Huan
AU - Martin, Nathan
AU - McGrew, Tyler
AU - Qian, Yicheng
AU - Schonauer, Eric
AU - Ehret, Alan
AU - Kinsy, Michel A.
N1 - Publisher Copyright:
© 2022 by the authors.
PY - 2022/9
Y1 - 2022/9
N2 - With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a microcontroller at a low-level using real tool-flows and implement and test their hardware. In this work, we describe our experiences with undergraduate engineers building RISC-V architectures on an FPGA and then extending their experiences to implement an Arduino-like RISC-V tool-flow and the respective hardware and software to handle input-output ports, interrupts, hardware timers, and communication protocols. The microcontroller is implemented on an FPGA as a Senior Design project to test the viability of such efforts. In this work, we will explain how undergraduates can achieve these experiences including preparation for these projects, the tool-flows they use, the challenges in understanding and extending a RISC-V processor with microcontroller functionality, and a suggestion of how to integrate this learning into an existing curriculum, including a discussion on if we should include these deeper experiences in the Computer Engineering undergraduate curriculum.
AB - With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a microcontroller at a low-level using real tool-flows and implement and test their hardware. In this work, we describe our experiences with undergraduate engineers building RISC-V architectures on an FPGA and then extending their experiences to implement an Arduino-like RISC-V tool-flow and the respective hardware and software to handle input-output ports, interrupts, hardware timers, and communication protocols. The microcontroller is implemented on an FPGA as a Senior Design project to test the viability of such efforts. In this work, we will explain how undergraduates can achieve these experiences including preparation for these projects, the tool-flows they use, the challenges in understanding and extending a RISC-V processor with microcontroller functionality, and a suggestion of how to integrate this learning into an existing curriculum, including a discussion on if we should include these deeper experiences in the Computer Engineering undergraduate curriculum.
KW - FPGA
KW - RISC-V
KW - computer architecture
KW - microcontroller
KW - undergraduate curriculum
UR - http://www.scopus.com/inward/record.url?scp=85138629344&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85138629344&partnerID=8YFLogxK
U2 - 10.3390/jlpea12030045
DO - 10.3390/jlpea12030045
M3 - Article
AN - SCOPUS:85138629344
SN - 2079-9268
VL - 12
JO - Journal of Low Power Electronics and Applications
JF - Journal of Low Power Electronics and Applications
IS - 3
M1 - 45
ER -