Compact models of emerging devices

Chi Shuen Lee, Shimeng Yu, Ximeng Guan, Jieying Luo, Lan Wei, H. S.Philip Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Compact modeling of resistive switching memory (RRAM) and carbon nanotube field-effect transistor (CNFET) are presented. The models are suitable for exploration of device design space, assessment of device performance at the circuit level. Optimization of the CNFET device structure to minimize the gate delay is presented as a demonstration of the model's capability. Simulation of neuromorphic computation system is an example application of the RRAM model. The models can be used to perform advance explorations of circuits and sub-systems of emerging devices prior to the availability of reliable, high-yielding fabrication processes for the emerging devices.

Original languageEnglish (US)
Title of host publication2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013
DOIs
StatePublished - Dec 23 2013
Event2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013 - Hong Kong, Hong Kong
Duration: Jun 3 2013Jun 5 2013

Publication series

Name2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013

Other

Other2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013
Country/TerritoryHong Kong
CityHong Kong
Period6/3/136/5/13

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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