Challenges and promising results in NoC prototyping using FPGAs

Umit Y. Ogras; Radu Marculescu; Hyung Gyu Lee; Puru Choudhary; Diana Marculescu; Michael Kaufman; Peter Nelson

doi:10.1109/MM.2007.4378786

Challenges and promising results in NoC prototyping using FPGAs

Umit Y. Ogras, Radu Marculescu, Hyung Gyu Lee, Puru Choudhary, Diana Marculescu, Michael Kaufman, Peter Nelson

Research output: Contribution to journal › Article › peer-review

33 Scopus citations

Abstract

Although a significant amount of theoretical work supports the potential of NoC architectures, such results need to be demonstrated by actual implementations before the NoC paradigm becomes a reality. Besides demonstrating the feasibility of the overall approach, prototyping enables accurate evaluation of power, performance, area, and various design trade-offs. This article presents four NoC prototypes, discusses the challenges associated with their design, and assesses the potential of the NoC approach.

Original language	English (US)
Pages (from-to)	86-95
Number of pages	10
Journal	IEEE Micro
Volume	27
Issue number	5
DOIs	https://doi.org/10.1109/MM.2007.4378786
State	Published - Sep 2007
Externally published	Yes

Keywords

Computer system implementation
Computer systems organization
FPGAs
Field programmable gate arrays
Iinterconnection networks
Interconnection network
Network on chip

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/MM.2007.4378786

Cite this

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abstract = "Although a significant amount of theoretical work supports the potential of NoC architectures, such results need to be demonstrated by actual implementations before the NoC paradigm becomes a reality. Besides demonstrating the feasibility of the overall approach, prototyping enables accurate evaluation of power, performance, area, and various design trade-offs. This article presents four NoC prototypes, discusses the challenges associated with their design, and assesses the potential of the NoC approach.",

keywords = "Computer system implementation, Computer systems organization, FPGAs, Field programmable gate arrays, Iinterconnection networks, Interconnection network, Network on chip",

author = "Ogras, {Umit Y.} and Radu Marculescu and Lee, {Hyung Gyu} and Puru Choudhary and Diana Marculescu and Michael Kaufman and Peter Nelson",

note = "Funding Information: This research was supported by the Gigascale Systems Research Focus Center, one of five research centers funded under the Focus Center Research Program, a Semiconductor Research Corporation program, and in part by Semiconductor Research Corporation Contract 2004-HJ-1189.",

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AU - Marculescu, Radu

AU - Lee, Hyung Gyu

AU - Choudhary, Puru

AU - Marculescu, Diana

AU - Kaufman, Michael

AU - Nelson, Peter

N1 - Funding Information: This research was supported by the Gigascale Systems Research Focus Center, one of five research centers funded under the Focus Center Research Program, a Semiconductor Research Corporation program, and in part by Semiconductor Research Corporation Contract 2004-HJ-1189.

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N2 - Although a significant amount of theoretical work supports the potential of NoC architectures, such results need to be demonstrated by actual implementations before the NoC paradigm becomes a reality. Besides demonstrating the feasibility of the overall approach, prototyping enables accurate evaluation of power, performance, area, and various design trade-offs. This article presents four NoC prototypes, discusses the challenges associated with their design, and assesses the potential of the NoC approach.

AB - Although a significant amount of theoretical work supports the potential of NoC architectures, such results need to be demonstrated by actual implementations before the NoC paradigm becomes a reality. Besides demonstrating the feasibility of the overall approach, prototyping enables accurate evaluation of power, performance, area, and various design trade-offs. This article presents four NoC prototypes, discusses the challenges associated with their design, and assesses the potential of the NoC approach.

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KW - Computer systems organization

KW - FPGAs

KW - Field programmable gate arrays

KW - Iinterconnection networks

KW - Interconnection network

KW - Network on chip

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Challenges and promising results in NoC prototyping using FPGAs

Abstract

Keywords

ASJC Scopus subject areas

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