TY - GEN
T1 - An enhanced ISI shaping technique for multi-bit ΔΣ DACs
AU - Sanyal, Arindam
AU - Sun, Nan
PY - 2014
Y1 - 2014
N2 - This paper presents an improved ISI shaping technique for multi-bit ΔΣ DACs. Compared to the prior ISI shaping method (Lars Risbo et al, JSSC, 2011) that monitors only the up (0 → 1) transitions, the proposed technique makes use of both the up and down (1 → 0) transitions with negligible hardware cost. It provides a finer control of the transition activity, thereby improving the ISI shaping effect. In addition, due to the tight coupling between the ISI and mismatch shaping loops, the proposed technique also improves the mismatch shaping result. Simulation results show that it can reduce ISI induced distortions by 10 dB compared to the prior ISI shaping technique and 50 dB compared to DWA.
AB - This paper presents an improved ISI shaping technique for multi-bit ΔΣ DACs. Compared to the prior ISI shaping method (Lars Risbo et al, JSSC, 2011) that monitors only the up (0 → 1) transitions, the proposed technique makes use of both the up and down (1 → 0) transitions with negligible hardware cost. It provides a finer control of the transition activity, thereby improving the ISI shaping effect. In addition, due to the tight coupling between the ISI and mismatch shaping loops, the proposed technique also improves the mismatch shaping result. Simulation results show that it can reduce ISI induced distortions by 10 dB compared to the prior ISI shaping technique and 50 dB compared to DWA.
UR - http://www.scopus.com/inward/record.url?scp=84907387304&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84907387304&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2014.6865641
DO - 10.1109/ISCAS.2014.6865641
M3 - Conference contribution
AN - SCOPUS:84907387304
SN - 9781479934324
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 2341
EP - 2344
BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Y2 - 1 June 2014 through 5 June 2014
ER -