Abstract
We report on the design fabrication and testing of a wide range transconductance amplifier fabricated in the 0.18 μm MIT Lincoln Labs 3D SOI-CMOS process. The amplifier is designed to operate in subthreshold and employs self-biased cascode transistors to minimize the bias lines transversing the tiers in the technology.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - IEEE International Symposium on Circuits and Systems |
| Pages | 137-140 |
| Number of pages | 4 |
| State | Published - 2007 |
| Externally published | Yes |
| Event | 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States Duration: May 27 2007 → May 30 2007 |
Other
| Other | 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 |
|---|---|
| Country/Territory | United States |
| City | New Orleans, LA |
| Period | 5/27/07 → 5/30/07 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering