The error of the numeric approximation of the semiconductor device equations particularly depends on the grid used for the discretization. Since the most interesting regions of the device are generally straightforward to identify, the method of choice is to use structurally aligned grids. Here, we present an algorithm for generating structurally aligned grids, including anisotropy, and for producing grids whose resolution varies over several orders of magnitude. Furthermore, the areas with increased resolution and the corresponding resolutions can be defined in a flexible manner and criteria on grid quality can be enforced. The grid generation algorithm was applied to sample structures which highlight the features of this method. Furthermore we generated grids for the simulation of a high voltage trench gate MOSFET. In order to resolve the junction regions accurately, four regions were defined where the grid was grown in several directions with varying resolutions. Finally device simulations performed by MINIMOS NT show current voltage characteristics and the threshold voltage.